Software-Implemented Hardware Fault Tolerance

Contents......Page 7
1. Introduction......Page 13
2.1 Faults, errors and failures......Page 16
2.2 A taxonomy of faults......Page 18
2.3 Classifying the effects of faults......Page 19
2.4 Dependability and its attributes......Page 21
3.1 Error models for hardware components......Page 22
3.2 Error models for software components......Page 31
4.1 Sources of highly energized particles......Page 34
4.2 Physical origin of single-event effects......Page 36
4.4 SEU mechanisms in DRAMs......Page 37
4.5 SEU mechanisms in SRAMs......Page 39
4.6 Single-event effects in logic circuits......Page 40
5. Redundancy techniques......Page 42
5.1 Hardware redundancy......Page 43
5.2 Information redundancy......Page 44
5.3 Time redundancy......Page 45
5.4 Software redundancy......Page 46
6. References......Page 47
2. Computation Duplication......Page 49
2.1 Methods based on instruction-level duplication......Page 50
2.2 Procedure-level duplication......Page 61
2.3 Program-level duplication......Page 66
3. Executable assertions......Page 71
4. References......Page 73
2. Background......Page 75
3.1 The approach......Page 82
3.3 Advantages and limitations......Page 85
4.1 The approach......Page 86
4.3 Advantages and limitations......Page 87
5.2 BEEC......Page 88
5.4 Experimental results......Page 90
6.1 The approach......Page 91
6.3 Advantages and limitations......Page 93
7.1 The approach......Page 94
7.2 Experimental results......Page 95
8.1 The approach......Page 97
8.2 ECCA-HL......Page 98
8.3 ECCA-IL......Page 100
8.4 Experimental results......Page 101
9.1 The approach......Page 102
9.3 Advantages and limitations......Page 104
10.1 The approach......Page 105
10.3 Advantages and limitations......Page 106
11.1 The approach......Page 107
11.3 Advantages and limitations......Page 110
12.1 The approach......Page 111
12.2 Experimental results......Page 113
12.3 Advantages and limitations......Page 114
13.1 The approach......Page 115
13.2 Experimental results......Page 117
13.3 Advantages and limitations......Page 119
14.1 The approach......Page 120
14.2 Experimental results......Page 125
15. References......Page 126
2. Design diversity......Page 129
2.1 N-version programming......Page 131
2.2 Recovery Block......Page 134
3. Checkpointing......Page 141
4.2 Matrix multiplication......Page 143
4.3 FFT......Page 150
4.4 Final comments......Page 153
5.1 Duplication and checksum......Page 154
5.2 Duplication and hamming code......Page 159
1. Introduction......Page 164
2. Control flow checking......Page 166
2.1 Assigned run-time signature control-flow checking......Page 168
2.2 Derived run-time signature control-flow checking......Page 170
3. Memory access checking......Page 180
4. Reasonableness checking......Page 182
4.2 Watchdog methods for general purpose applications......Page 183
5. Combined techniques......Page 184
5.1 Duplication and watchdog......Page 185
5.2 Infrastructure-IP......Page 187
2. The FARM Model......Page 210
2.2 Intrusiveness......Page 211
2.3 Speed......Page 212
3.1 Set F......Page 213
3.2 Set A......Page 215
3.4 Set M......Page 216
4.1 Simulation-based fault injection......Page 218
4.2 Software-implemented fault injection......Page 224
4.3 Hybrid fault injection......Page 229
5. References......Page 234
E......Page 236
P......Page 237
Y......Page 238